Reference Design of a 1-Wire B
reference design of a 1-wire bidirectional voltage-level translator for 1.8v to 5v
abstract: designers need open-drain logic to run at 1.8v at the 1-wire master io. most 1-wire slave devices cannot run at 1.8v. this application note presents an rd (reference design) of a circuit that translates from a 1.8v 1-wire master to a 5v 1-wire slave device. the rd is used for driving typical 1-wire slave devices. the max3394e voltage-level translator is featured in the design.
introductiondevices such as fpgas, microprocessors, the ds2482-100, and ds2480b are examples of 1-wire master devices. the 1-wire/ibutton® slave devices are manufactured by maxim and comprise an extensive family of parts that typically operate from 2.8v to 5.25v. the 1-wire masters and slave devices have traditionally been 5v open-drain logic in the past.
today designers need open-drain logic to run at 1.8v at the 1-wire master io. while most 1-wire slave devices can run safely at 5v, most of those same devices cannot run at 1.8v. a bidirectional voltage-level translator circuit is needed to overcome this limitation. this rd (reference design) features the maxim® max3394e, which is a bidirectional voltage-level translator for these applications.
voltage-level translatorthe max3394e is a dual-level translator available in an 8-pin, 3mm x 3mm tdfn package. it is ideal for driving high-capacitive loads, thanks to its internal slew-rate enhancement circuitry. 1-wire slave devices often have capacitive loading greater than 500pf. the max3394e's vcc i/o pins are protected to ±15kv hbm (human body model), which protects the 1-wire master. the 1-wire bus architectures often interface to the external world, making hbm essential. however, it is recommended that a ds9503p be added as esd protection for the pullup resistor (r3), the optional strong pullup circuitry, and the 1-wire slave device.
application circuitthe circuit in figure 1 shows the max3394e used to perform bidirectional 1.8v to 5v voltage-level translation in an open-drain system.
figure 1. schematic of 1-wire bidirectional voltage level translation from 1.8v to 5v. note that the pins i/o vl and i/o vcc have a typical 10kω internal pullup.
the bom (bill of materials) for this reference design is given in table 1.
table 1. bill of materials item quantity reference part manufacturer part number
1 1 c1 1.0µf 0402 panasonic ecj-0eb0j105m
2 2 c2, c3 0.1µf 0201 panasonic ecj-zeb0j104k
3 1 q1 bss84-7-f diodes, inc/zetex bss84-7-f
4 1 r1 33ω 0201 panasonic erj-1gej330c
5 1 r2 10kω 0402 panasonic erj-2rkf1002x
6 1 r3 1kω 0402 panasonic erj-2rkf1001x
7 1 r4 2.2kω 0402 panasonic erj-2rkf2201x
8 2 ch1, ch2 test point n/a n/a
9 1 u1 max3394e maxim max3394eeta+
waveform measurements/test resultsthe test results in figures 2 through 5 were generated from the board built for evaluating the circuit.
setup: vl = 1.8v vcc = 5.0v ch1: 1-wire master (ow_master) ch2: ds1920 (ow_slave) ow_slave wire length: 2.4m, max. test results did not include the optional strong pullup circuitry in figure 1. room temperature measurements only
figure 2. the scope plot of a 1-wire reset shows the performance of the max3394e with presence pulse amplitude of no more than 250mv, lower than a typical 1-wire master vil maximum of 0.4v.
figure 3. the scope plot of a 1-wire write, one timeslot with a clean tlow1 < 15µs.
figure 4. the scope plot of a 1-wire write, zero timeslot with 60µs < tlow0 < 120µs.
figure 5. the scope plot of a 1-wire read, zero timeslot with an active 1-wire slave open-drain return and lower than a typical 1-wire master vil maximum of 0.4v.
conclusionthis rd for 1.8v to 5v 1-wire bidirectional logic-level translation drives typical 1-wire slave devices. the design was built and then tested. the circuit schematic, bom, and typical waveforms have been presented.
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abstract: designers need open-drain logic to run at 1.8v at the 1-wire master io. most 1-wire slave devices cannot run at 1.8v. this application note presents an rd (reference design) of a circuit that translates from a 1.8v 1-wire master to a 5v 1-wire slave device. the rd is used for driving typical 1-wire slave devices. the max3394e voltage-level translator is featured in the design.
introductiondevices such as fpgas, microprocessors, the ds2482-100, and ds2480b are examples of 1-wire master devices. the 1-wire/ibutton® slave devices are manufactured by maxim and comprise an extensive family of parts that typically operate from 2.8v to 5.25v. the 1-wire masters and slave devices have traditionally been 5v open-drain logic in the past.
today designers need open-drain logic to run at 1.8v at the 1-wire master io. while most 1-wire slave devices can run safely at 5v, most of those same devices cannot run at 1.8v. a bidirectional voltage-level translator circuit is needed to overcome this limitation. this rd (reference design) features the maxim® max3394e, which is a bidirectional voltage-level translator for these applications.
voltage-level translatorthe max3394e is a dual-level translator available in an 8-pin, 3mm x 3mm tdfn package. it is ideal for driving high-capacitive loads, thanks to its internal slew-rate enhancement circuitry. 1-wire slave devices often have capacitive loading greater than 500pf. the max3394e's vcc i/o pins are protected to ±15kv hbm (human body model), which protects the 1-wire master. the 1-wire bus architectures often interface to the external world, making hbm essential. however, it is recommended that a ds9503p be added as esd protection for the pullup resistor (r3), the optional strong pullup circuitry, and the 1-wire slave device.
application circuitthe circuit in figure 1 shows the max3394e used to perform bidirectional 1.8v to 5v voltage-level translation in an open-drain system.
figure 1. schematic of 1-wire bidirectional voltage level translation from 1.8v to 5v. note that the pins i/o vl and i/o vcc have a typical 10kω internal pullup.
the bom (bill of materials) for this reference design is given in table 1.
table 1. bill of materials item quantity reference part manufacturer part number
1 1 c1 1.0µf 0402 panasonic ecj-0eb0j105m
2 2 c2, c3 0.1µf 0201 panasonic ecj-zeb0j104k
3 1 q1 bss84-7-f diodes, inc/zetex bss84-7-f
4 1 r1 33ω 0201 panasonic erj-1gej330c
5 1 r2 10kω 0402 panasonic erj-2rkf1002x
6 1 r3 1kω 0402 panasonic erj-2rkf1001x
7 1 r4 2.2kω 0402 panasonic erj-2rkf2201x
8 2 ch1, ch2 test point n/a n/a
9 1 u1 max3394e maxim max3394eeta+
waveform measurements/test resultsthe test results in figures 2 through 5 were generated from the board built for evaluating the circuit.
setup: vl = 1.8v vcc = 5.0v ch1: 1-wire master (ow_master) ch2: ds1920 (ow_slave) ow_slave wire length: 2.4m, max. test results did not include the optional strong pullup circuitry in figure 1. room temperature measurements only
figure 2. the scope plot of a 1-wire reset shows the performance of the max3394e with presence pulse amplitude of no more than 250mv, lower than a typical 1-wire master vil maximum of 0.4v.
figure 3. the scope plot of a 1-wire write, one timeslot with a clean tlow1 < 15µs.
figure 4. the scope plot of a 1-wire write, zero timeslot with 60µs < tlow0 < 120µs.
figure 5. the scope plot of a 1-wire read, zero timeslot with an active 1-wire slave open-drain return and lower than a typical 1-wire master vil maximum of 0.4v.
conclusionthis rd for 1.8v to 5v 1-wire bidirectional logic-level translation drives typical 1-wire slave devices. the design was built and then tested. the circuit schematic, bom, and typical waveforms have been presented.
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