什么是PCIe4.0？启威测实测案例带你了解U.2接口PCIe4.0信号量测
一、什么是pcie4.0
pcie全称pci-express，中文名称为高速串行总线。4.0是pcie的一个版本，代表了系统总线的吞吐量，与cpu、gpu、显卡的数据传输速率息息相关。
可以把pcie理解为一条管道，数据需要通过它进行传输。越高版本pcie，管道的内部空间就越大，支持传输的数据也就越高。
pcie4.0能够支持16gt/s的传输速率，以及最高32gb/s的带宽。相比于pcie3.0，使用pcie4.0的用户直观体验就是电脑的运算速率变快了。包括了文件的拷贝、软件的打开使用、游戏的加载等，都会因为pcie的升级而提高速率。
二、什么是u.2接口
u.2接口别称sff-8639，是由固态硬盘形态工作组织(ssd form factor work group)推出的接口规范。u.2不但能支持sata-express规范，还能兼容sas、sata等规范。因此大家可以把它当做是四通道版本的sata-express接口，它的理论带宽已经达到了32gbps，与m.2接口毫无差别。
在台北电脑展上，sf-8639接口将正式改名为u.2接口，跟目前的m.2接口对应起来了，因此u.2接口也是今后很有潜力的ssd接口。
硬盘主要接口及特点
m.2接口的固态硬盘主要优点在于体积小巧、性能出色，比较广泛的用于台式电脑、笔记本、超级本等便携设备中。而u.2接口则具备速度更快，2.5英寸更好的与目前sata3.0接口固态硬盘兼容，适合主流笔记本、台式电脑，未来潜力较大。
总结，其实从直观表现上看，pcie4.0是虚拟的一种协议标准，而u.2接口是真实存在于现实世界中的硬件设备。
三、pcie4.0 实测案例
启威测实验室提供pcie3.0/4.0/5.0信号一致性测试验证，以下为pcie4.0 实测案例：
pcie4.0 项目比较多，本次测试的项目有：
① transmitter eletrical compliance test
② transmitter preset test
③ receiver link equalization test
1、测试设备：
示波器 tektronix mso73304dx
误码仪 anritsu mp1900a
探棒 tektronix tca292d
cbb板 pcie4.0 gen4 compliance base board
isi板 pcie4.0 gen4 isi board
2、测试数据：
1) transmitter eletrical compliance test
1.1 lane0 test for gen4 preset 7
• overall sigtest result: pass!
• mean unit interval (ps): 62.5
• min time between crossovers (ps): 13.342501
• data rate (gb/s): 16.0
• max peak to peak jitter: 27.081124 ps
• total jitter at ber of 10e-12: 30.994488 ps
total jitter at ber of 10e-12 passes sigtest limits!
• minimum eye width: 31.505512 ps
• deterministic jitter delta-delta: 10.503702 ps
deterministic jitter delta-delta passes sigtest limits!
• random jitter (rms): 1.456451 ps
random jitter (rms) passes sigtest limits!
• minimum transition eye voltage: -0.109627 volts
minimum transition eye voltage passes sigtest limits!
• maximum transition eye voltage: 0.106947 volts
maximum transition eye voltage passes sigtest limits!
• composite eye height: 0.05818
• composite eye location: 0.499
composite eye height passes sigtest limits!
• extrapolated eye height: 0.042053
extrapolated eye height passes sigtest limits!
• minimum transition eye voltage margin above eye: 0.021271 volts
minimum transition eye voltage margin above eye passes sigtest limits!
• minimum transition eye voltage margin below eye: -0.023354 volts
minimum transition eye voltage margin below eye passes sigtest limits!
• minimum transition eye height: 0.067625 volts
1.2 lane1 test for gen4 preset2
• overall sigtest result: pass!
• mean unit interval (ps): 62.5
• min time between crossovers (ps): 0.009861
• data rate (gb/s): 16.0
• max peak to peak jitter: 31.429782 ps
• total jitter at ber of 10e-12: 33.410254 ps
total jitter at ber of 10e-12 passes sigtest limits!
• minimum eye width: 29.089746 ps
• deterministic jitter delta-delta: 13.038507 ps
deterministic jitter delta-delta passes sigtest limits!
• random jitter (rms): 1.44799 ps
random jitter (rms) passes sigtest limits!
• minimum transition eye voltage: -0.103688 volts
minimum transition eye voltage passes sigtest limits
• maximum transition eye voltage: 0.102027 volts
maximum transition eye voltage passes sigtest limits!
• composite eye height: 0.035468
• composite eye location: 0.499
composite eye height passes sigtest limits!
• extrapolated eye height: 0.02508
extrapolated eye height passes sigtest limits!
• minimum transition eye voltage margin above eye: 0.015425 volts
minimum transition eye voltage margin above eye passes sigtest limits!
• minimum transition eye voltage margin below eye: -0.015217 volts
minimum transition eye voltage margin below eye passes sigtest limits!
• minimum transition eye height: 0.053642 volts
1.3 lane2 test for gen4 preset 8
• overall sigtest result: pass!
• mean unit interval (ps): 62.5
• min time between crossovers (ps): 0.00019
• data rate (gb/s): 16.0
• max peak to peak jitter: 29.85061 ps
• total jitter at ber of 10e-12: 32.966273 ps
total jitter at ber of 10e-12 passes sigtest limits!
• minimum eye width: 29.533727 ps
• deterministic jitter delta-delta: 9.820583 ps
deterministic jitter delta-delta passes sigtest limits!
• random jitter (rms): 1.645158 ps
random jitter (rms) passes sigtest limits!
• minimum transition eye voltage: -0.091297 volts
minimum transition eye voltage passes sigtest limits!
• maximum transition eye voltage: 0.090553 volts
maximum transition eye voltage passes sigtest limits!
• composite eye height: 0.039969
• composite eye location: 0.499
composite eye height passes sigtest limits!
• extrapolated eye height: 0.02373
extrapolated eye height passes sigtest limits!
• minimum transition eye voltage margin above eye: 0.014598 volts
minimum transition eye voltage margin above eye passes sigtest limits!
• minimum transition eye voltage margin below eye: -0.015475 volts
minimum transition eye voltage margin below eye passes sigtest limits!
• minimum transition eye height: 0.053073 volts
1.4 lane3 test for gen4 preset 7
• overall sigtest result: pass!
• mean unit interval (ps): 62.5
• min time between crossovers (ps): 0.519146
• data rate (gb/s): 16.0
• max peak to peak jitter: 26.917085 ps
• total jitter at ber of 10e-12: 29.872554 ps
total jitter at ber of 10e-12 passes sigtest limits!
• minimum eye width: 32.627446 ps
• deterministic jitter delta-delta: 8.776463 ps
deterministic jitter delta-delta passes sigtest limits!
• random jitter (rms): 1.499476 ps
random jitter (rms) passes sigtest limits!
• minimum transition eye voltage: -0.085465 volts
minimum transition eye voltage passes sigtest limits!
• maximum transition eye voltage: 0.087877 volts
maximum transition eye voltage passes sigtest limits!
• composite eye height: 0.047144
• composite eye location: 0.499
composite eye height passes sigtest limits!
• extrapolated eye height: 0.034929
extrapolated eye height passes sigtest limits!
• minimum transition eye voltage margin above eye: 0.017345 volts
minimum transition eye voltage margin above eye passes sigtest limits!
• minimum transition eye voltage margin below eye: -0.017729 volts
minimum transition eye voltage margin below eye passes sigtest limits!
• minimum transition eye height: 0.058074 volts
1.5 worst non transition signal eye
lane0-gen4 lane1-gen4
lane2-gen4 lane3-gen4
2) transmitter preset test for gen4
lane name preset name preshoot de-emphasis result
lane0 p0 gen4 0.000 db -5.810 db pass
p10 gen4 0.000 db -9.258 db pass
p1 gen4 0.000 db -3.370 db pass
p2 gen4 0.000 db -4.533 db pass
p3 gen4 0.000 db -2.444 db pass
p4 gen4 0.000 db 0.000 db pass
p5 gen4 1.952 db 0.000 db pass
p6 gen4 2.462 db 0.000 db pass
p7 gen4 3.792 db -6.373 db pass
p8 gen4 3.466 db -3.448 db pass
p9 gen4 3.427 db 0.000 db pass
lane1 p0 gen4 0.000 db -5.791 db pass
p10 gen4 0.000 db -9.230 db pass
p1 gen4 0.000 db -3.372 db pass
p2 gen4 0.000 db -4.500 db pass
p3 gen4 0.000 db -2.377 db pass
p4 gen4 0.000 db 0.000 db pass
p5 gen4 1.935 db 0.000 db pass
p6 gen4 2.368 db 0.000 db pass
p7 gen4 3.756 db -6.321 db pass
p8 gen4 3.447 db -3.456 db pass
p9 gen4 3.368 db 0.000 db pass
lane2 p0 gen4 0.000 db -5.815 db pass
p10 gen4 0.000 db -9.232 db pass
p1 gen4 0.000 db -3.357 db pass
p2 gen4 0.000 db -4.478 db pass
p3 gen4 0.000 db -2.389 db pass
p4 gen4 0.000 db 0.000 db pass
p5 gen4 1.904 db 0.000 db pass
p6 gen4 2.329 db 0.000 db pass
p7 gen4 3.733 db -6.307 db pass
p8 gen4 3.405 db -3.465 db pass
p9 gen4 3.327 db 0.000 db pass
lane3 p0 gen4 0.000 db -5.744 db pass
p10 gen4 0.000 db -9.225 db pass
p1 gen4 0.000 db -3.314 db pass
p2 gen4 0.000 db -4.475 db pass
p3 gen4 0.000 db -2.355 db pass
p4 gen4 0.000 db 0.000 db pass
p5 gen4 1.917 db 0.000 db pass
p6 gen4 2.396 db 0.000 db pass
p7 gen4 3.801 db -6.359 db pass
p8 gen4 3.478 db -3.437 db pass
p9 gen4 3.382 db 0.000 db pass
3) receiver link equalization test
test items lane data rate value units result specification
add-in card rx leq,100mhz lane0 16gbps 0 unit pass <=1 error
lane1 16gbps 0 unit pass <=1 error
lane2 16gbps na unit na <=1 error
lane3 16gbps 0 unit pass <=1 error
3、pcie4.0测试结果汇总：
测试项 信号速率 信号通道 测试结果 备注
transmitter eletrical compliance test 16gbps lane0 pass
lane1 pass
lane2 pass
lane3 pass
transmitter preset test 16gbps lane0 pass
lane1 pass
lane2 pass
lane3 pass
receiver link equalization test 16gbps lane0 pass
lane1 pass
lane2 na 无法进入loopback
lane3 pass
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pcie全称pci-express，中文名称为高速串行总线。4.0是pcie的一个版本，代表了系统总线的吞吐量，与cpu、gpu、显卡的数据传输速率息息相关。
可以把pcie理解为一条管道，数据需要通过它进行传输。越高版本pcie，管道的内部空间就越大，支持传输的数据也就越高。
pcie4.0能够支持16gt/s的传输速率，以及最高32gb/s的带宽。相比于pcie3.0，使用pcie4.0的用户直观体验就是电脑的运算速率变快了。包括了文件的拷贝、软件的打开使用、游戏的加载等，都会因为pcie的升级而提高速率。
二、什么是u.2接口
u.2接口别称sff-8639，是由固态硬盘形态工作组织(ssd form factor work group)推出的接口规范。u.2不但能支持sata-express规范，还能兼容sas、sata等规范。因此大家可以把它当做是四通道版本的sata-express接口，它的理论带宽已经达到了32gbps，与m.2接口毫无差别。
在台北电脑展上，sf-8639接口将正式改名为u.2接口，跟目前的m.2接口对应起来了，因此u.2接口也是今后很有潜力的ssd接口。
硬盘主要接口及特点
m.2接口的固态硬盘主要优点在于体积小巧、性能出色，比较广泛的用于台式电脑、笔记本、超级本等便携设备中。而u.2接口则具备速度更快，2.5英寸更好的与目前sata3.0接口固态硬盘兼容，适合主流笔记本、台式电脑，未来潜力较大。
总结，其实从直观表现上看，pcie4.0是虚拟的一种协议标准，而u.2接口是真实存在于现实世界中的硬件设备。
三、pcie4.0 实测案例
启威测实验室提供pcie3.0/4.0/5.0信号一致性测试验证，以下为pcie4.0 实测案例：
pcie4.0 项目比较多，本次测试的项目有：
① transmitter eletrical compliance test
② transmitter preset test
③ receiver link equalization test
1、测试设备：
示波器 tektronix mso73304dx
误码仪 anritsu mp1900a
探棒 tektronix tca292d
cbb板 pcie4.0 gen4 compliance base board
isi板 pcie4.0 gen4 isi board
2、测试数据：
1) transmitter eletrical compliance test
1.1 lane0 test for gen4 preset 7
• overall sigtest result: pass!
• mean unit interval (ps): 62.5
• min time between crossovers (ps): 13.342501
• data rate (gb/s): 16.0
• max peak to peak jitter: 27.081124 ps
• total jitter at ber of 10e-12: 30.994488 ps
total jitter at ber of 10e-12 passes sigtest limits!
• minimum eye width: 31.505512 ps
• deterministic jitter delta-delta: 10.503702 ps
deterministic jitter delta-delta passes sigtest limits!
• random jitter (rms): 1.456451 ps
random jitter (rms) passes sigtest limits!
• minimum transition eye voltage: -0.109627 volts
minimum transition eye voltage passes sigtest limits!
• maximum transition eye voltage: 0.106947 volts
maximum transition eye voltage passes sigtest limits!
• composite eye height: 0.05818
• composite eye location: 0.499
composite eye height passes sigtest limits!
• extrapolated eye height: 0.042053
extrapolated eye height passes sigtest limits!
• minimum transition eye voltage margin above eye: 0.021271 volts
minimum transition eye voltage margin above eye passes sigtest limits!
• minimum transition eye voltage margin below eye: -0.023354 volts
minimum transition eye voltage margin below eye passes sigtest limits!
• minimum transition eye height: 0.067625 volts
1.2 lane1 test for gen4 preset2
• overall sigtest result: pass!
• mean unit interval (ps): 62.5
• min time between crossovers (ps): 0.009861
• data rate (gb/s): 16.0
• max peak to peak jitter: 31.429782 ps
• total jitter at ber of 10e-12: 33.410254 ps
total jitter at ber of 10e-12 passes sigtest limits!
• minimum eye width: 29.089746 ps
• deterministic jitter delta-delta: 13.038507 ps
deterministic jitter delta-delta passes sigtest limits!
• random jitter (rms): 1.44799 ps
random jitter (rms) passes sigtest limits!
• minimum transition eye voltage: -0.103688 volts
minimum transition eye voltage passes sigtest limits
• maximum transition eye voltage: 0.102027 volts
maximum transition eye voltage passes sigtest limits!
• composite eye height: 0.035468
• composite eye location: 0.499
composite eye height passes sigtest limits!
• extrapolated eye height: 0.02508
extrapolated eye height passes sigtest limits!
• minimum transition eye voltage margin above eye: 0.015425 volts
minimum transition eye voltage margin above eye passes sigtest limits!
• minimum transition eye voltage margin below eye: -0.015217 volts
minimum transition eye voltage margin below eye passes sigtest limits!
• minimum transition eye height: 0.053642 volts
1.3 lane2 test for gen4 preset 8
• overall sigtest result: pass!
• mean unit interval (ps): 62.5
• min time between crossovers (ps): 0.00019
• data rate (gb/s): 16.0
• max peak to peak jitter: 29.85061 ps
• total jitter at ber of 10e-12: 32.966273 ps
total jitter at ber of 10e-12 passes sigtest limits!
• minimum eye width: 29.533727 ps
• deterministic jitter delta-delta: 9.820583 ps
deterministic jitter delta-delta passes sigtest limits!
• random jitter (rms): 1.645158 ps
random jitter (rms) passes sigtest limits!
• minimum transition eye voltage: -0.091297 volts
minimum transition eye voltage passes sigtest limits!
• maximum transition eye voltage: 0.090553 volts
maximum transition eye voltage passes sigtest limits!
• composite eye height: 0.039969
• composite eye location: 0.499
composite eye height passes sigtest limits!
• extrapolated eye height: 0.02373
extrapolated eye height passes sigtest limits!
• minimum transition eye voltage margin above eye: 0.014598 volts
minimum transition eye voltage margin above eye passes sigtest limits!
• minimum transition eye voltage margin below eye: -0.015475 volts
minimum transition eye voltage margin below eye passes sigtest limits!
• minimum transition eye height: 0.053073 volts
1.4 lane3 test for gen4 preset 7
• overall sigtest result: pass!
• mean unit interval (ps): 62.5
• min time between crossovers (ps): 0.519146
• data rate (gb/s): 16.0
• max peak to peak jitter: 26.917085 ps
• total jitter at ber of 10e-12: 29.872554 ps
total jitter at ber of 10e-12 passes sigtest limits!
• minimum eye width: 32.627446 ps
• deterministic jitter delta-delta: 8.776463 ps
deterministic jitter delta-delta passes sigtest limits!
• random jitter (rms): 1.499476 ps
random jitter (rms) passes sigtest limits!
• minimum transition eye voltage: -0.085465 volts
minimum transition eye voltage passes sigtest limits!
• maximum transition eye voltage: 0.087877 volts
maximum transition eye voltage passes sigtest limits!
• composite eye height: 0.047144
• composite eye location: 0.499
composite eye height passes sigtest limits!
• extrapolated eye height: 0.034929
extrapolated eye height passes sigtest limits!
• minimum transition eye voltage margin above eye: 0.017345 volts
minimum transition eye voltage margin above eye passes sigtest limits!
• minimum transition eye voltage margin below eye: -0.017729 volts
minimum transition eye voltage margin below eye passes sigtest limits!
• minimum transition eye height: 0.058074 volts
1.5 worst non transition signal eye
lane0-gen4 lane1-gen4
lane2-gen4 lane3-gen4
2) transmitter preset test for gen4
lane name preset name preshoot de-emphasis result
lane0 p0 gen4 0.000 db -5.810 db pass
p10 gen4 0.000 db -9.258 db pass
p1 gen4 0.000 db -3.370 db pass
p2 gen4 0.000 db -4.533 db pass
p3 gen4 0.000 db -2.444 db pass
p4 gen4 0.000 db 0.000 db pass
p5 gen4 1.952 db 0.000 db pass
p6 gen4 2.462 db 0.000 db pass
p7 gen4 3.792 db -6.373 db pass
p8 gen4 3.466 db -3.448 db pass
p9 gen4 3.427 db 0.000 db pass
lane1 p0 gen4 0.000 db -5.791 db pass
p10 gen4 0.000 db -9.230 db pass
p1 gen4 0.000 db -3.372 db pass
p2 gen4 0.000 db -4.500 db pass
p3 gen4 0.000 db -2.377 db pass
p4 gen4 0.000 db 0.000 db pass
p5 gen4 1.935 db 0.000 db pass
p6 gen4 2.368 db 0.000 db pass
p7 gen4 3.756 db -6.321 db pass
p8 gen4 3.447 db -3.456 db pass
p9 gen4 3.368 db 0.000 db pass
lane2 p0 gen4 0.000 db -5.815 db pass
p10 gen4 0.000 db -9.232 db pass
p1 gen4 0.000 db -3.357 db pass
p2 gen4 0.000 db -4.478 db pass
p3 gen4 0.000 db -2.389 db pass
p4 gen4 0.000 db 0.000 db pass
p5 gen4 1.904 db 0.000 db pass
p6 gen4 2.329 db 0.000 db pass
p7 gen4 3.733 db -6.307 db pass
p8 gen4 3.405 db -3.465 db pass
p9 gen4 3.327 db 0.000 db pass
lane3 p0 gen4 0.000 db -5.744 db pass
p10 gen4 0.000 db -9.225 db pass
p1 gen4 0.000 db -3.314 db pass
p2 gen4 0.000 db -4.475 db pass
p3 gen4 0.000 db -2.355 db pass
p4 gen4 0.000 db 0.000 db pass
p5 gen4 1.917 db 0.000 db pass
p6 gen4 2.396 db 0.000 db pass
p7 gen4 3.801 db -6.359 db pass
p8 gen4 3.478 db -3.437 db pass
p9 gen4 3.382 db 0.000 db pass
3) receiver link equalization test
test items lane data rate value units result specification
add-in card rx leq,100mhz lane0 16gbps 0 unit pass <=1 error
lane1 16gbps 0 unit pass <=1 error
lane2 16gbps na unit na <=1 error
lane3 16gbps 0 unit pass <=1 error
3、pcie4.0测试结果汇总：
测试项 信号速率 信号通道 测试结果 备注
transmitter eletrical compliance test 16gbps lane0 pass
lane1 pass
lane2 pass
lane3 pass
transmitter preset test 16gbps lane0 pass
lane1 pass
lane2 pass
lane3 pass
receiver link equalization test 16gbps lane0 pass
lane1 pass
lane2 na 无法进入loopback
lane3 pass
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什么是PCIe4.0？启威测实测案例带你了解U.2接口PCIe4.0信号量测
数字信号采集方式有哪些
无人机用氢燃料电池发电系统标准发布，具有里程碑意义的突破
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高新兴物联宣布与阿里巴巴达成战略合作
PLC交通灯控制系统设计
MAX6625,MAX6626 9位/12位温度传感器,带有I2C兼容串行接口
网络安全对电子制造业的影响
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