LTC2311特性及演示板2425A主要特性
linear公司的ltc2311-16是低噪音高速16位sar5mspsadc，差分输入和宽输入共模范围，单电源3.3v或5v工作，差分输入范围8vp-p，fin = 2.2mhz时的snr为81db，thd为-90db，16位时±3lsb inl，不会丢失码，主要用在高速数据采集系统，通信，遥控数据采集，图像，光网络，汽车电子和对相马达控制。本文介绍了ltc2311特性，框图，应用电路以及演示板2425a主要特性，连接图，电路图，材料清单和pcb元件布局图。
the ltcr2311-16 is a low noise， high speed 16-bitsuccessive approximation register （sar） adc withdifferential inputs and wide input common mode range.
operating from a single 3.3v or 5v supply， the ltc2311-16 has an 8vp-p differential input range， making it idealfor applications which require a wide dynamic range withhigh common mode rejection. the ltc2311-16 achieves±3lsb inl typical， no missing codes at 16 bits and 81dbsnr typical.
the ltc2311-16 has an onboard low drift （20ppm/℃ max）2.048v or 4.096v temperature-compensated reference andprovides an external 1.25v buffered reference input. theltc2311-16 also has a high speed spi-compatible serialinterface that supports cmos or lvds. the fast 5mspsthroughput with one-cycle latency makes the ltc2311-16ideally suited for a wide variety of high speed applications.
the ltc2311-16 dissipates only 50mw with a 5v supplyand offers nap and sleep modes to reduce the powerconsumption to 5μw for further power savings duringinactive periods.
ltc2311特性：
5msps throughput rate
±3lsb inl （typ）， ±8lsb inl guaranteed
guaranteed 16-bit， no missing codes
8vp-p differential inputs with wide input commonmode range
81db snr （typ） at fin = 2.2mhz
–90db thd （typ） at fin = 2.2mhz
guaranteed operation –40℃ to 125℃
single 3.3v or 5v supply
low drift （20ppm/℃ max） 2.048v or 4.096v internalreference with 1.25v external reference input
1.8v to 2.5v i/o voltages
cmos or lvds spi-compatible serial i/o
power dissipation 50mw at vdd = 5v （typ）
small 16-lead （4mm × 5mm） msop package
ltc2311应用：
high speed data acquisition systems
communications
remote data acquisition
imaging
optical networking
automotive
multiphase motor control
图1.ltc2311框图:cmos i/o模式
图2.ltc2311框图:lvds i/o模式
图3.ltc2311全差分应用电路
演示板2425a
demonstration circuit 2425a features the ltc®2311 family.with up to 5msps， these differential， single channel， 16-bit，serial， high speed successive approximation register（sar） adcs are available in a 16-lead msop package.
the ltc2311 family has an internal 20ppm/°c maximumdrift reference and an spi-compatible serial interface thatsupports cmos and lvds logic. note the demo board isconfigured for cmos operation by default; see the noteunder jp3 for lvds operation. the following text refersto the ltc2311， but applies to all members of the family，the only difference being the sample rate and/or thenumber of bits. the dc2425a demonstrates the dc andac performance of the ltc2311 in conjunction with thedc890 pscope™ data collection board. alternatively， byconnecting the dc2425a into a customer application， theperformance of the ltc2311 can be evaluated directly inthat circuit.
图4.演示板2425a连接示意图
图5.演示板2425a电路图(1)
图6.演示板2425a电路图(2)
演示板2425a材料清单(bom):
图7.演示板2425a pcb元件布局
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the ltcr2311-16 is a low noise， high speed 16-bitsuccessive approximation register （sar） adc withdifferential inputs and wide input common mode range.
operating from a single 3.3v or 5v supply， the ltc2311-16 has an 8vp-p differential input range， making it idealfor applications which require a wide dynamic range withhigh common mode rejection. the ltc2311-16 achieves±3lsb inl typical， no missing codes at 16 bits and 81dbsnr typical.
the ltc2311-16 has an onboard low drift （20ppm/℃ max）2.048v or 4.096v temperature-compensated reference andprovides an external 1.25v buffered reference input. theltc2311-16 also has a high speed spi-compatible serialinterface that supports cmos or lvds. the fast 5mspsthroughput with one-cycle latency makes the ltc2311-16ideally suited for a wide variety of high speed applications.
the ltc2311-16 dissipates only 50mw with a 5v supplyand offers nap and sleep modes to reduce the powerconsumption to 5μw for further power savings duringinactive periods.
ltc2311特性：
5msps throughput rate
±3lsb inl （typ）， ±8lsb inl guaranteed
guaranteed 16-bit， no missing codes
8vp-p differential inputs with wide input commonmode range
81db snr （typ） at fin = 2.2mhz
–90db thd （typ） at fin = 2.2mhz
guaranteed operation –40℃ to 125℃
single 3.3v or 5v supply
low drift （20ppm/℃ max） 2.048v or 4.096v internalreference with 1.25v external reference input
1.8v to 2.5v i/o voltages
cmos or lvds spi-compatible serial i/o
power dissipation 50mw at vdd = 5v （typ）
small 16-lead （4mm × 5mm） msop package
ltc2311应用：
high speed data acquisition systems
communications
remote data acquisition
imaging
optical networking
automotive
multiphase motor control
图1.ltc2311框图:cmos i/o模式
图2.ltc2311框图:lvds i/o模式
图3.ltc2311全差分应用电路
演示板2425a
demonstration circuit 2425a features the ltc®2311 family.with up to 5msps， these differential， single channel， 16-bit，serial， high speed successive approximation register（sar） adcs are available in a 16-lead msop package.
the ltc2311 family has an internal 20ppm/°c maximumdrift reference and an spi-compatible serial interface thatsupports cmos and lvds logic. note the demo board isconfigured for cmos operation by default; see the noteunder jp3 for lvds operation. the following text refersto the ltc2311， but applies to all members of the family，the only difference being the sample rate and/or thenumber of bits. the dc2425a demonstrates the dc andac performance of the ltc2311 in conjunction with thedc890 pscope™ data collection board. alternatively， byconnecting the dc2425a into a customer application， theperformance of the ltc2311 can be evaluated directly inthat circuit.
图4.演示板2425a连接示意图
图5.演示板2425a电路图(1)
图6.演示板2425a电路图(2)
演示板2425a材料清单(bom):
图7.演示板2425a pcb元件布局
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