abstract: the following application note discusses the advantages of using the ds1632 pc power fail and reset controller to consolidate various power management functions into one device vs. using discreet components. the ds1632 performs clock signal generation, reset generation, power-fail signal generation and generation of a low battery signal.
pin configuration
pin description
pin name
description
active-low pbrst
pushbutton reset input
x1, x2
crystal inputs
vbat
battery input
lb, active-low lb
low battery outputs
rst, active-low rst
reset outputs
rd
reset duration
tol
selects 5% or 10% detection
gnd
ground
oscout
oscillator out
vcco
switched power out
pf, active-low pf
power fail outputs
vcc
+5 volt power in
the ds1632 has been specifically designed to consolidate various power management functions into one device. the ds1632 can perform four system functions:
clock signal generation (32.768khz) for a real time clock.
reset generation, including external pushbutton reset input.
power fail signal generation and transparent switching from vcc to a secondary battery vbat when vcc is out of tolerance.
generation of a low battery signal, indicating the backup battery has fallen out of a minimum acceptable tolerance. while the functions provided by the ds1632 can be realized using discrete components, cost, pc board space, reliability, and engineering efficiencies make the four function 16 pin package a more attractive implementation.
clock signal generationa system design requiring an accurate timekeeping source or real time clock is best served by using one of the real time clocks offered by maxim which combine a real time clock, memory, and 10 year non-volatility in the absence of power. however, some designs contain chipsets which provide a real time clock function, without the accuracy or reliability of the maxim real time clock. for customer designs that must make use of another manufacturer's chipset, the ds1632 provides the highly accurate clock signal generation required to drive a real time clock. a significant part of the accuracy of any digital real time clock is its reliance upon receiving an accurate, consistent clock oscillator input, which the ds1632 provides. the logic required to produce this function discretely is as follows in figure 1.
figure 1. oscillator.
the ds1632's oscillator requires only the 32.768khz crystal input. the ds1632's oscillator is tuned to accept a 6pf load and to provide an accuracy of ±2 minutes/ month when used with either the daiwa dt26s, the seiko ds-vt-200 or an equivalent crystal.
reset generation
generating reset signals for a microprocessorreset signal generation for a microprocessor must be triggerable from a variety of sources. most notably, during a power fail situation, during power up, and externally as a user demanded system reset. the ds1632 provides all three of these functions that would otherwise have to be provided discretely as shown (figure 2).
figure 2. reset generation.
to provide the same functions as the ds1632 reset generator system, a designer would have to use a 5-bit counter, an 8-bit counter, 2-3 nand gates, an octal latch, an octal inverter, a single inverter, and a 1ms clock signal to the circuit. the ds1632 replaces these discrete components, providing piece part count reduction which conserves circuit board space.
the ds1632 accepts triggers for resets from:
a pushbutton input, high to low, on active-low pbrst.
vcc coming into tolerance as characterized by a low to high transition on the pf pin which disables reset.
vcc going out of tolerance as characterized by a high to low transition on the pf pin which triggers reset. active-low pf, pf, and active-low pbrst are internally generated by the ds1632 and would not have to be generated by other external circuitry.
the ds1632 not only generates active-low pf and pf signals for an out of tolerance vcci, but also switches between vcci and an external supply to provide an uninterrupted vcco, regardless of the status of vcci. the discrete circuitry required to duplicate these functions is illustrated in figures 3 and 4.
figure 3. power fail signal generation.
figure 4. external battery supply switching.
duplicating the ds1632's power fail and switching functions would require constructing or buying a band gap voltage reference, 3 resistors, 1 mux, 2 comparators, and 2 p-channel mosfets, and an inverter. the solution implemented discretely would also require more operating current than the condensed functionality provided by the ds1632.
generation of low battery signalthe ds1632 provides early warning notification that the backup power source is falling out of tolerance and should be replaced. the discrete circuit required to duplicate this functionality is shown in figure 5.
figure 5. backup battery monitoring.
from the diagram, duplicating the battery fail detection system would require the use of two resistors, one op amp, one comparator, an inverter, and an accurate voltage reference, such as that provided by a band gap reference, for comparison. the ds1632 produces the band gap voltage reference internally, as well as eliminating the need for the resistors and other external components.
a system solutionall four functions of the ds1632 implemented discretely would consume a significant amount of circuit board space with a high piece part count which would drive up costs.
the ds1632 provides these functions in low pin count 16 pin dip or soic package. in addition, the ds1632 solution is built from a very low power cmos process, giving added reliability and lifetime to battery operated and battery backed up systems. the ds1632 also provides the benefit of a stable clock oscillator which aids in accurate timekeeping for the chipset resident real time clock. all things considered, the ds1632 provides the ideal answer for pc chipset battery operated and battery backed up applications.
discrete system bill of materials
est. cost
32.768khz clock oscillator
$1.50
5-bit counter
$ .20
8-bit counter
$ .20
ls04 (4 nand gates)
$ .20
octal latch w/inverters
$ .25
1ms clock source
$1.00
band gap voltage reference
$ .70
5 chip resistors
$ .10
1 dual input mux
$ .20
2 dual comparators
$1.00
2 fets
$ .20
ls type inverter (quad)
$ .20
sub-total
$5.75
maxim solution
cost
ds1632
$2.10
daiwa part dt26s or
seiko part ds-vt-200
$ .35
sub-total
$2.45
* discrete materials costs are estimates. actual costs may differ.
** ds1632 pricing listed is for an order quantity of 5,000 pieces.
figure 6. consolidated solution for ds1632.
system applicationsthe ds1632 power manager hooks directly to the intel 386sl superset to provide continuous power to the 82360sl's real time clock, reset signals to both the 82360sl and 386sl, power monitoring signals to the 386sl, oscillator input to the 82360sl's rtc, and backup battery supply monitoring.
intel 386sl microprocessor superset connections
vcco from the ds1632 connects directly to the 82360sl, rtc vcc, input pin 177, to provide an uninterrupted power supply to the 82360's real time clock, regardless of the status of vcc.
oscout from the ds1632 connects directly to the 82360sl, rtc x1 input, providing the 82360sl with a 32.768khz square wave input.
active-low reset from the ds1632 connects directly to the rc# input, pin 58, of the 82360sl, providing a signal which triggers the 82360sl to produce a reset on its cpu reset output pin.
lb from the ds1632 connects directly to the 82360sl through any of the irq pins (interrupt request). the interrupt request service routine for that interrupt must be configured to perform a function acknowledging the low battery status of the 3v cell connected to the ds1632.
reset from the 1632 connects directly to the 386sl processor input, cpu reset, pin 2, providing an active high signal to reset the processor. this signal can be provided alternatively through the 82360sl's cpu reset output, triggered by the active-low reset signal from the ds1632.
active-low pf from the ds1632 connects directly to the pwr good input of the 386sl, pin 18. when active-low pf from the ds1632 is high, pwr good allows the 386sl to operate normally. when active-low pf becomes active low, pwr good going low on the 386sl causes the processor to reset its core, internal state machines, and configuration registers.
the ds1632 is designed to provide its interrupt monitoring signals in complemented sets so that the ds1632 can be connected to any microprocessor or chip set without having to invert the outputs.
the diagram below, chips technologies/siemens 82c206 connections, shows the ds1632 connecting to the popular at bus chip. in this configuration, the ds1632 provides:
out of tolerance vcc and pushbutton reset generation.
real time clock oscillator input.
vcc monitoring and notification of out of tolerance vcc.
backup battery monitoring and generation of warning signal, lb, indicating vbat is out of tolerance.
chips technologies/siemens 82c206 connections
active-low pf from the ds1632 connects directly to pin 14, pwr good, of the 82c206. when active-low pf becomes active low, the 82c206's address, data, strobe, and r/w pins are disconnected from the microprocessor.
pf can be connected to one of the 82c206's interrupt request pins (irq pins) to act as a warning that vcc is out of tolerance or sent to the µp as an interrupt.
vcco from the ds1632 connects directly to the 82c206's vcc pin. vcco from the ds1632 can provide for the 82c206's normal operating voltage and current requirements with vcc in tolerance and for sustaining the rtc functions of the 82c206 from its 3 volt power source, vbat, when vcc is in less than the attached backup battery.
reset from the ds1632 connects directly to the 82c206 reset input pin, which resets the 82c206's dma control registers and interrupt controllers.
reset from the ds1632 connects to the active-low psrstb input of the 82c206. this reset input is primarily a power on reset input for the 82c206, but can also act as an externally triggered reset input.
oscout from the ds1632 provides the 32.768khz oscillator input to the 82c206 through the osc1 input on the 82c206.
lb from the ds1632 connects directly to an interrupt request line on the 82c206. lb from the ds1632 indicates that the lithium backup cell has fallen out of tolerance.
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